1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device by encapsulating a bonded body, which has a semiconductor element (e.g., a semiconductor chip) flip-chip bonded to a wiring substrate, with a molding resin.
The invention also relates to an apparatus for resin-encapsulating to seal the flip-chip bonded body with a molding resin.
2. Description of the Related Art
Flip-chip bonding is a method for connecting ball-shaped protruded electrodes (hereinafter called bumps), which are formed as external connecting terminals on electrode pads of a semiconductor chip, to connecting terminals of a wiring substrate.
FIG. 16 shows a structure of the semiconductor device (hereinafter called a flip-chip bonded semiconductor device) which has a semiconductor chip such as a silicon semiconductor connected to the wiring substrate by the flip-chip bonding.
In a conventional flip-chip bonded semiconductor device, a semiconductor chip 2 having bumps 1 such as solder balls is mounted on one main face of a wiring substrate 3 and electrically connected thereto through the bumps 1. External connecting terminals (not shown) are formed on the other main face of the wiring substrate 3 and electrically connected to the bumps of the semiconductor chip 2 through internal wiring (not shown) formed within the wiring substrate. A signal from or to an integrated circuit formed on the semiconductor chip 2 is input or output through the external connecting terminals of the wiring substrate 3. In the gap between the wiring substrate 3 and the semiconductor chip 2, where the bumps 1 are formed, a resin-encapsulating layer 4 made of epoxy resin or the like is disposed to protect the connection of the semiconductor chip 2 with the wiring substrate 3.
This resin-encapsulating layer 4 is conventionally formed by the following method.
As shown in FIG. 17A, a liquid resin (e.g., epoxy resin) 6 thermally softened and stocked in a syringe 5 is dispensed in the neighborhood of the sides of the semiconductor chip 2 mounted on the wiring substrate 3 through a dispense nozzle 7. The dispensed liquid resin 6 permeates into the gap between the wiring substrate 3 and the semiconductor chip 2 by a capillary action as shown in FIG. 17B. As shown in FIG. 17C, the liquid resin 6 is fully filled into the space among the bumps 1 and cured to form underfill.
Such a method for forming the resin-encapsulating layer, however, has a disadvantage that it takes time to form the underfill by filling the liquid resin 6 into the gap between the wiring substrate 3 and the semiconductor chip 2.
To form fillet 4a (as shown in FIG. 16) after filling the resin into the gap, the liquid resin 6 is dispensed again to apply in the neighborhood of the sides of the semiconductor chip 2, where the liquid resin 6 was not applied in the first dispensing step. This method, however, has disadvantages that time for forming the resin-encapsulating layer 4 is a total of time required for applying the liquid resin 6 by dispensing and that required for filling the molding resin into the gap between the semiconductor chip and the wiring substrate 3 by permeating the molding resin through the sides of the semiconductor chip 2, resulting in taking a long time and lowering productivity.
In manufacturing a semiconductor device by mounting a semiconductor chip on a lead-frame and wire-bonding the electrode pads of the semiconductor chip to the leads of the lead-frame, the resin-encapsulating layer is formed by transfer molding.
But, if such a method for forming the resin-encapsulating layer were directly adopted in order to manufacture the flip-chip bonded semiconductor device, it has a disadvantage of defectively filling the molding resin because the gap between the semiconductor chip and the wiring substrate is very small to about 0.2 mm. If the molding resin had a low viscosity, it has a disadvantage of spreading around (flowing to the periphery) to adhere to undesired portions, causing defective appearance. Besides, such disadvantages are becoming serious because the gap between the semiconductor chip and the wiring substrate has a tendency to become smaller to 0.01 to 0.1 mm.